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Espressif Systems /ESP32-S3 /RTC_CNTL /SDIO_CONF

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Interpret as SDIO_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SDIO_TIMER_TARGET0SDIO_DTHDRV 0SDIO_DCAP 0SDIO_INITI 0 (SDIO_EN_INITI)SDIO_EN_INITI 0SDIO_DCURLIM 0 (SDIO_MODECURLIM)SDIO_MODECURLIM 0 (SDIO_ENCURLIM)SDIO_ENCURLIM 0 (SDIO_REG_PD_EN)SDIO_REG_PD_EN 0 (SDIO_FORCE)SDIO_FORCE 0 (SDIO_TIEH)SDIO_TIEH 0 (REG1P8_READY)REG1P8_READY 0DREFL_SDIO 0DREFM_SDIO 0DREFH_SDIO 0 (XPD_SDIO)XPD_SDIO

Description

configure flash power

Fields

SDIO_TIMER_TARGET

timer count to apply reg_sdio_dcap after sdio power on
SDIO_DTHDRV

Tieh = 1 mode drive ability. Initially set to 0 to limit charge current, set to 3 after several us.
SDIO_DCAP

ability to prevent LDO from overshoot
SDIO_INITI

add resistor from ldo output to ground. 0: no res, 1: 6k,2:4k,3:2k
SDIO_EN_INITI

0 to set init[1:0]=0
SDIO_DCURLIM

tune current limit threshold when tieh = 0. About 800mA/(8+d)
SDIO_MODECURLIM

select current limit mode
SDIO_ENCURLIM

enable current limit
SDIO_REG_PD_EN

power down SDIO_REG in sleep. Only active when reg_sdio_force = 0
SDIO_FORCE

1: use SW option to control SDIO_REG, 0: use state machine
SDIO_TIEH

SW option for SDIO_TIEH. Only active when reg_sdio_force = 1
REG1P8_READY

read only register for REG1P8_READY
DREFL_SDIO

SW option for DREFL_SDIO. Only active when reg_sdio_force = 1
DREFM_SDIO

SW option for DREFM_SDIO. Only active when reg_sdio_force = 1
DREFH_SDIO

SW option for DREFH_SDIO. Only active when reg_sdio_force = 1
XPD_SDIO

power on flash regulator

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data